7 research outputs found

    i. Low Power Receiver for Medical Implantable Communication System using Delay Locked Loop

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    This paper presents and implements a low power receiver for medical implantable communication system (MICS) using delay locked loop (DLL). Compared to current existing transceivers for MICS that use phase locked loop (PLL), the DLL offers the advantage of power consumption at the 402-406 MHz band. This work implemented a DLL with two channels, two mixers for switching channels, and a low noise amplifier (LNA). The DLL, mixer and LNA structure are simple in order to consume lower power. LNA input and output were also designed to match a 50-ohm impedance. The DLL and power consumption of the two mixers was 4.8 mW and the LNA was 2.3 mW

    Bootstrap capacitorless DCM VOT buck converter with dead-time-based off-time calibration for magnetic resonance wireless power transfer

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    This study reports a miniaturised discontinuous conduction mode (DCM) variable on-time (VOT) buck converter providing an output of 1.8 V in the input range of 3-12 V to support applications with large wireless coupling. Conventionally, an additional large capacitor has been used as a bootstrap capacitor to drive the high-side switch of buck converters, which prevents minimisation. In this study, a standalone momentary power consumption level shifter is proposed to remove the additional bootstrap capacitor and increase the power conversion efficiency (PCE) in the buck converter. A Zener diode is utilised to reduce the power consumption of the level shifter. In addition, a dead-time-based off-time calibration circuit is proposed to further increase the PCE by reducing the low-side conduction loss. The proposed circuit is fabricated with a TSMC 0.18-mu m BCD process, and the core circuit occupies an active area of 0.68 mm(2) with two external components. It provides output currents in the range of 20 mu A to 3 mA with a maximum switching frequency of 750 kHz. The maximum efficiency of the converter below 5 mW is 80.2%
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